SoC devices typically include the following components on a single substrate:
(1) microcontroller, microprocessor or digital signal processor (DSP) core(s); and some SoCs that are referred to as multiprocessor systems on chip (MPSoC), may include more than one processor core;
(2) memory blocks including ROM, RAM, EEPROM and Flash memory;
(3) timing sources including oscillators and phased-locked loops;
(4) peripherals including counter, timers and real-time timers,
(5) external interfaces including USB, FireWire, Ethernet, USART, SPI, I2C,
(6) analog interfaces including ADCs and DACs;
(7) voltage regulators and power management circuits; and
(8) various user configurable general-purpose input and output (GPIO) pins.
The manufacture of electronic circuit board assemblies consists of two basic stages: board assembly and board testing. Testing may involve an in-circuit test and/or a functional test. In-circuit testing verifies that the board has been assembled according to vendor manufacturing specifications. Functional testing ensures that acceptable electronic circuits perform functions as designed. Testing of sophisticated electronic circuits requires a complex test system that may entail extensive functional testing protocols and expensive and intricate test fixtures. The process is labor intensive unless it is fully automated.
Implementing suitable test fixtures can be technically challenging and expensive; moreover, the test fixture is often designed only after the circuit board has been completed and prototypes built and tested. This approach causes unnecessary delays in production and product release.
For a simple electronic test system, one or more test signals are applied to a device under test (DUT) and the response of the unit is measured at one or more locations and compared with the responses that would be attained by a standard, operating circuit. Exemplary testing techniques include: (1) “Flying Probe” testing; (2) ROM (Read Only Memory) emulation, (3) using a debug port for testing; (4) using a complex test fixture connecting to each test point on a DUT; and (5) using a complex test system emulating behavior of each external device, which is normally connected to a DUT in an operation mode. These methods are generally difficult to implement in manufacturing processes.
An example of a test fixture for testing a complex circuit board is described in U.S. Patent No. 2006/0250149 to Lan and features a testing platform, a base disposed on the testing platform, a probe coupled to the testing platform and disposed on the base, and a conversion board disposed between the bases. The test fixture's main disadvantage is its mechanical complexity that requires a chain of multiple connections between a test point on the DUT and a probe. Lan does not address functional testing of circuit boards.
Another example of a test system for testing electronic boards that contain at least one processor is described in U.S. Pat. No. 6,842,865 to Nee et al. The test system includes a processor control unit that is connected to a DUT and which runs test routines on the DUT. The system also contains an electronic circuit emulating at least one peripheral device, which is connected to the DUT, a response circuit measuring a response of the DUT to a test routine and a main controller, which communicates with the response circuit in order to obtain the results of the test routine. The complex test system requires much external hardware and complex software to implement.
Finally, an illustrative apparatus for testing computer systems using a complex test fixture is described in U.S. Pat. No. 7,188,276 to Yun. The test fixture incorporates a controller, which controls the testing of the computer system, a field programmable gate array (FPGA) and several programmable memory modules. Each programmable memory module stores configuration data of peripheral devices of the computer system in corresponding versions respectively. Its complexity is the system's major drawback in that it requires external hardware to emulate external components and requires maintaining various versions of programmable memory modules to accommodate different versions of systems being tested.